Faculty Profile

FACULTY BIO- DATA

Name –Mrs. Kurlekar Supriya Pradeep
Designation –Lecturer
Department – Electronics Engg.
Date of Birth –8th sep 1975
E-Mail ID –spkurlekar@rediffmail.com

Educational Qualification -

Sr. No.

Degree

University

Class Obtained

1

M.E.(Electronics)

Shivaji University, Kolhapur.

Pursuing

2

B.E.(Electronics)

Shivaji University, Kolhapur.

First Class

3

H.S.C.

Kolhapur Board

First Class, disst.

4

S.S.C.

Pune Board

First Class, disst.

                         Experience Details -

Sr. No.

Name of Employer

Post held

Period

Total Years

1

Dr.J.J.M.C.O.E.,Jaysingpur

Lecturer

30 July 1998
Till date

11

                         Details of STTP’s Attended -

Sr. No.

Name of Course

Place

Period

Dates

01

Advanced signal processing tech in instrumentation

P.V.P.I.T.,Budhgaon

Two weeks

3 to 14 Dec 2007

02

Teaching padagogies &modern trends in teaching

Dr.J.J.M.C.O.E.,
Jaysingpur

Two weeks

26 Dec to 6 Jan 2007

03

Modern Trains in communication and siganl Processing

D. C. E. T. Ashata

Two weeks

9 to 20 June 2008

04

Fuzzy, Mathamatics, & Matlab App.

Dr.J.J.M.C.O.E.,
Jaysingpur

Two weeks

15 to 26 Dec 2008

                         Details of Paper Published / Presented –

Sr. No.

Title of Paper

Publication details

01

Cordic Algorithm

CISCON 2006 Manipal

3-4 Nov2006

02

FPGA implementation of CORDIC Architecture

ETA 2006 Rajkot

1-2 Oct2006

03

CORDIC coprocessor for DSP Applications

NCDSP 2007 Mumbai Fr. C.R.C.E

19 to 20 Jan 2007

04

Reconfigurable Computing

NUCONE, Nirma Univesity Ahmedabad

27,28,29 Nov 2008

05

Cordic for trignometric Computing

NCEEERE S.M.I.T. Sikkim

22,23,24 Dec 2008

06

Hardware Algorithm for Elementory functions in S.P.

ITECH09,Sangmaner

4-5March2009

07

FPGA Based Iterative Processor For DSP

NTCT-09 PVPIT,Budhgaon

4 April 2009

Sr. No.	Degree	University	Class Obtained
1	M.E.(Electronics)	Shivaji University, Kolhapur.	Pursuing
2	B.E.(Electronics)	Shivaji University, Kolhapur.	First Class
3	H.S.C.	Kolhapur Board	First Class, disst.
4	S.S.C.	Pune Board	First Class, disst.

Sr. No.	Name of Employer	Post held	Period	Total Years
1	Dr.J.J.M.C.O.E.,Jaysingpur	Lecturer	30 July 1998 Till date	11

Sr. No.	Name of Course	Place	Period	Dates
01	Advanced signal processing tech in instrumentation	P.V.P.I.T.,Budhgaon	Two weeks	3 to 14 Dec 2007
02	Teaching padagogies &modern trends in teaching	Dr.J.J.M.C.O.E., Jaysingpur	Two weeks	26 Dec to 6 Jan 2007
03	Modern Trains in communication and siganl Processing	D. C. E. T. Ashata	Two weeks	9 to 20 June 2008
04	Fuzzy, Mathamatics, & Matlab App.	Dr.J.J.M.C.O.E., Jaysingpur	Two weeks	15 to 26 Dec 2008

Sr. No.	Title of Paper	Publication details
01	Cordic Algorithm	CISCON 2006 Manipal	3-4 Nov2006
02	FPGA implementation of CORDIC Architecture	ETA 2006 Rajkot	1-2 Oct2006
03	CORDIC coprocessor for DSP Applications	NCDSP 2007 Mumbai Fr. C.R.C.E	19 to 20 Jan 2007
04	Reconfigurable Computing	NUCONE, Nirma Univesity Ahmedabad	27,28,29 Nov 2008
05	Cordic for trignometric Computing	NCEEERE S.M.I.T. Sikkim	22,23,24 Dec 2008
06	Hardware Algorithm for Elementory functions in S.P.	ITECH09,Sangmaner	4-5March2009
07	FPGA Based Iterative Processor For DSP	NTCT-09 PVPIT,Budhgaon	4 April 2009